1. Field of the Invention
This invention relates to a semiconductor device and more particularly to a high-voltage transistor or the like provided in a core portion of the row decoder of a NAND flash memory, for example.
2. Description of the Related Art
Conventionally, for example, in high-voltage transistors and the like, electric lines of force extend into the element isolation insulating film disposed between the adjacent transistors to make unstable the potentials of the gate and source/drain of the adjacent transistor. In this state, if a high-voltage is applied, an inversion layer occurs in the interface between the element isolation insulating film and the semiconductor substrate and extends to the adjacent transistor. As a result, a phenomenon that a current flows between the transistors, that is, a so-called field inversion occurs.
In order to prevent occurrence of the field inversion, it is necessary to increase the depth of the element isolation insulating film disposed between the high-voltage transistors and the distance between the transistors. Therefore, it is disadvantageous for miniaturization.
For example, in FIG. 3(d) of Jpn. Pat. Appln. KOKAI Publication No. 4-199658, an example is disclosed in which an isolation transistor is provided between adjacent high-voltage transistors and elements are isolated by cutting off the isolation transistor to prevent occurrence of field inversion.
However, in the above example, it is necessary to provide the isolation transistors, and therefore, the area is increased due to the presence of the isolation transistors and it is still disadvantageous for miniaturization.